Interested in learning how to utilize Virtex.-4 FPGA architectural resources effectively? This course focuses on understanding and utilizing several of the new and enhanced resources found in our newest device. Topics covered include an overview of the Virtex-4 FPGA; the Digital Clock Manager (DCM) and Phase-Matched Clock Divider (PMCD); global and regional clocking techniques; memory and FIFO; and source-synchronous resources. A combination of modules and labs allow for practical hands-on application of the principles taught in this course...DOWNLOAD DESIGNING WITH THE VIRTEX-4 FAMILY COURSE DETAIL

Experienced Xilinx users or those who have taken the Fundamentals of FPGA Design and Designing for Performance courses. Students should have a solid understanding of Virtex-II, Virtex-II Pro, and Virtex-II ProX FPGA architectures, the ISE. software, timing constraints, and timing closure techniques.