Designing with Ethernet MAC Controllers
Become acquainted with the various solutions that Xilinx offeres for Ethernet connectivity. Learn basics of the Ethernet standard, protocol, and OSI model while applying Xilinx solutions via hands-on laboratory exercises. Perform simulation to understand fundamental principles and obtain the knowledge to assess hardware design considerations and software development requirements.
Download Course description
Who Should Attend
Engineers who would like to come up to speed on utilizing Xilinx Ethernet connectivity solutions (soft cores and hard IP)
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At-A-Glance |
Schedule |
- Course
No: EMAC23000-ILT
- Course Duration: 2 Days
- Price: USD $1,400
or 14 Xilinx
Training Credits
- Level:
Intermediate
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Prerequisites
- Fundamentals of FPGA Design course
- C programming knowledge recommended
- Experience with Xilinx ISE™ and Embedded Development Kit (EDK) software tools
- Software
Tools
> Xilinx ISE™ 8.2i SP1 with IP update 1
> Mentor Graphics ModelSim ISE 6.0
> EDK 8.2
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Nothing currently scheduled.
Please contact us for customized classes.
Tel: (702) 736-4116 • Fax: (865) 251-9771
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COURSE OUTLINE
Day 1
- Ethernet Basics
- Network Protocols, Ethernet Interfaces, and Hardware
- Lab 1: Analyzing Ethernet Frames
- Physical Layer
- LocalLink Interface
- Lab2: VLAN and Jumbo Frames
- Xilinx EMAC Solutions
Day 2
- Lab 3: Implementation
- EMAC and EMAC Lite
- Lab 4: EMAC Peripheral in Loopback Mode
- GEMAC
- TEMAC
- Lab 5: TEMAC in Loopback Mode
- 10G EMAC
- Lab 6: Analyzing 10G EMAC Frames
LAB DESCRIPTION
> Lab1: Analyzing Ethernet Frames - Understand components of Ethernet frames and how the packets flow. Analyze various packets and observe how the core reacts to MAC address changes.
> Lab 2: VLAN and Jumbo Frames - Modify the configuration register to enable and observe the effects of VLAN and jumbo frames. Understand statistics vectors.
> Lab 3: Implementation - Use CORE Generator™ software to generate a gigabit Ethernet core and then proceed with the implementation flow.
> Lab 4: EMAC Peripheral in Loopback Mode - Use EDK to instantiate and connect the OPB EMAC peripheral to the OPB bus. Develop software to place the core in loopback mode.
> Lab 5: TEMAC in Loopback Mode - Use the EDK to instantiate a hard TEMAC and a soft PLB TEMAC wrapper. Configure cores in scatter gather DMA mode. Use three programs to test the hardware in polled, simple DMA, and scater/gather DMA modes after placing the hardware in loopback mode.
> Lab 6: Analyzing 10G EMAC Frames - Use the ModelSim simulator to perform functional simulation. Analyze various frames from XGMII and the client interface point of view. |
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