Xilinx FPGAs provide a new level of system design capabilities through soft MicroBlaze™ processors, hard PowerPC® processors, and silicon-efficient architectural resources. This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK). The features and capabilities of the Xilinx MicroBlaze soft processor and the PowerPC 440 processor are also included in the lectures and labs. The hands-on labs provide experience with the development, debugging, and simulation of an embedded system.
Engineers who are interested in developing embedded systems with the Xilinx MicroBlaze soft processor or IBM PowerPC 440 core using the Embedded Development Kit and a Xilinx FPGA
At-A-Glance
Schedule
Course
No: EMBD21000-ILT
Course Duration: 16:00 HR
Price: USD $1,400
or 14 Xilinx
Training Credits
Level:
Intermediate
Prerequisites
FPGA design experience
Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
Basic understanding of C programming
Some HDL modeling experience
Software
Tools
Xilinx ISE Design Suite: System Edition 11.4
Mentor Graphics ModelSim simulator
October 11-12, 2010 San Diego, CA Torrey Villas Conference Center
Lab 1: Hardware Construction with the Base System Builder
Software Development Using SDK
Lab 2: Adding and Downloading Software
System Buses
Processor Basics
Interrupts
Adding Hardware to an Embedded Design
Lab 3: Adding IP to a Hardware Design
Day 2
Interfacing to the Processor System
Designing Your Own Peripheral Using the IPIC Interface
Installing Your Own Peripheral Using the IPIC Interface
Lab 4: Building a Custom IP Peripheral for an Embedded
System – PLB v46 Bus
Bus Functional Model Simulation
Lab 5: BFM Simulation
Adding Your Own IP to the Embedded System
Lab 6: Integrating a Custom Peripheral
LAB DESCRIPTION
Both the MicroBlaze and PowerPC 440 processors are supported in the labs. All labs target the Spartan-6 FPGA SP605, Spartan-3E FPGA 1600E, or Virtex-5 FPGA ML507 boards.
Lab 1: Hardware Construction with the Base System Builder – Create an XPS project by using the Base System Builder to develop a basic hardware system and generate a series of netlists for the embedded design.
Lab 2: Adding and Downloading Software – Complete the processes begun in Lab 1 by building the software libraries and applications, generating a bitstream file, merging the application into the bitstream, and downloading to the board.
Lab 3: Adding IP to a Hardware Design – Learn to add IP from the many choices in the IP library. Use the GUI to add a general-purpose I/O module and access internal block RAM directly from the MHS file.
Lab 4: Building a Custom IP Peripheral for an Embedded
System – Create and add custom IP (IPIC interface) to your design by using the Create or Import Peripheral Wizard.
Lab 5:BFM Simulation – Use the ModelSim simulator to perform Bus Functional Model simulation to verify functionality of the LCD bus peripheral added in the preceding lab.
Lab 6: Integrating a Custom Peripheral – Put it all together: add custom IP to the processor system, then integrate the processor sub-system with other logic in the design.
