How to Design Xilinx Embedded Systems 1 day (XAP)
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The workshop introduces you to fundamental embedded design concepts and techniques for implementation in Xilinx FPGAs. The focus is on fundamental aspects of Xilinx embedded tools, IP, and the Embedded Targeted Reference Design (TRD). Design examples and labs are drawn from the Embedded TRD.
Only essential theory is introduced in order to lay a foundation for the material and topics covered in this workshop, which complements more detailed training found in subsequent Xilinx courses.
* This workshop focuses on the Spartan-6 and Virtex-6 architectures. Check with your local Authorized Training Provider for the specifics of the in-class lab board or other customizations.
Who Should Attend
FPGA designers and logic designers
- Course Duration: 8:00 HR
- Price: USD $700
or 7 Xilinx
FPGA design experience
Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
Basic microprocessor experience and understanding of PowerPC®-processor and MicroBlaze™-processor systems
Xilinx ISE® Design Suite: Embedded or System Edition 13.1
Nothing currently scheduled.
Please contact us for customized classes.
Tel: 303.444.7884 • Fax: 866.402.0763
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Xilinx Embedded Processing Overview
Building an Embedded Processor System in XPS
Lab 1: Hardware Construction with the Base System Builder
Software Development in SDK
Embedded Processor IP Component Features
Lab 2: Adding and Downloading Software
Embedded Targeted Reference Design Overview
Lab 3: Embedded Targeted Reference Design
The MicroBlaze processor labs are based on the AXI interconnect.
Lab 1: Hardware Construction with the Base System Builder – Create an XPS project by using the Base System Builder to develop a basic hardware system and generate an embedded processor system component as part of a larger ISE software design.
Lab 2: Adding and Downloading Software – Complete the processes begun in Lab 1 using the SDK tools to create a software BSP and sample application. Configure the FPGA and download the application.
Lab 3: Targeted Reference Design – Utilize the Embedded Targeted Reference Design. Identify how you can use it as a starting point for your own design.